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Supertex inc.
Low Noise Dimmable EL Lamp Driver
Features
Adjustable output regulation for dimming 220VPP output voltage for higher brightness Single cell lithium ion compatible 150nA shutdown current Separately adjustable lamp and converter frequencies 3x3 QFN-12 package Split supply capability
HV860
Initial Release
The HV860 has two internal oscillators, a switching MOSFET, and a high voltage EL lamp driver H-bridge. The frequency for the switching MOSFET is set by an external resistor connected between the RSW-OSC pin and the supply pin VDD. The EL lamp driver frequency is set by an external resistor connected between REL-OSC pin and VDD pin. An external inductor is connected between the LX and VDD pins or VIN for split supply applications. A 3.0nF capacitor is connected between CS and ground. The EL lamp is connected between VA and VB. The switching MOSFET charges the external inductor and discharges it into the capacitor at CS. The voltage at CS will start to increase. Once the voltage at CS reaches a nominal value of 110V, the switching MOSFET is turned OFF to conserve power. The outputs VA and VB are configured as an H bridge and are switching in opposite states to achieve 110V across the EL lamp. EL lamp dimming can be accomplished by changing the input voltage to the VREG pin. The VREG pin allows an external voltage source to control the VCS amplitude. The VCS voltage is approximately 87 times the voltage seen on VREG.
Applications
Mobile cellular phone keypads PDAs Handheld wireless communication products Global Positioning Systems (GPS)
General Description
The Supertex HV860 is a high voltage driver designed for driving Electroluminescent, (EL), lamps of up to 5 square inches. The input supply voltage range is from 2.5V to 4.5V. The device uses a single inductor and a minimum number of passive components. Using the internal reference voltage, the regulated output voltage is at a nominal voltage of 110V. The EL lamp will therefore see 110V. An enable pin, (EN), is available to turn the device on and off via a logic signal.
Typical Application Circuit
VIN CIN LX RREG
2 3 5
D CS
7 9 8
VDD CDD 1.5V = On 0V = Off
10
VREG VDD RSW-OSC REL-OSC EN
VREF
RSW
LX CS VA VB
12 1
REL 11
EL Lamp
GND
4
HV860K7
NR040306
Supertex inc.
* 1235 Bordeaux Drive, Sunnyvale, CA 94089 * Tel: (408) 222-8888 * FAX: (408) 222-4895 * www.supertex.com
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HV860
Ordering Information
Device HV860
-G indicates package is RoHS compliant (`Green')
Thermal Resistance
Package Option QFN-12 HV860K7-G Package QFN-12 ja 60 C/W
Pin Configuration
RSW-OSC EN VDD 12 11 10
Absolute Maximum Ratings
Parameter VDD, Supply Voltage Operating Temperature Storage Temperature Power Dissipation QFN-12 VCS, Output Voltage VREG External Input Voltage Value -0.5V to 6.0V -40C to +85C -65C to +150C 1.6W -0.5V to +120V 1.33V
REL-OSC VREG VREF
1 2 3
9
VA VB CS
HV860K7
8 7
4
5
6 NC
GND LX
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground.
QFN-12 Top View
Note: Pads are at the bottom of the package. Center heat slug is at ground potential
Electrical Characteristics
DC Characteristics (Over recommended operating conditions unless otherwise specified TA=25C) Symbol RDS(ON) VCS VCS VREG VREFH IDDQ IDD IIN fEL fSW D VIH VIL IIH Parameter On-resistance of switching transistor Maximum output regulation voltage Min Output regulation voltage External input voltage range VREF output high voltage Quiescent VDD supply current Input current going into the VDD pin Input current including inductor current EL lamp frequency Switching transistor frequency Switching transistor duty cycle Enable input logic high voltage Enable input logic low voltage Enable input logic high current 0 1.18 160 76 1.5 0 Typ 95 75 55 1.26 200 90 Max 6.0 120 1.26 1.33 150 200 16 240 104 88 VDD 0.2 1.0 V V nA A mA Hz kHz % V V A V Units V Conditions I = 100mA VDD = 2.5V to 4.5V VDD = 2.5V to 4.5V, VREG = 1.092V VDD = 2.5V to 4.5V, VREG = 0.862V VDD = 2.5V to 4.5V, VREG = 0.632V VDD = 2.5V to 4.5V VDD = 2.5V to 4.5V EN = low VDD = 2.5V to 4.5V, REL = 2.0M, RSW = 1.0M see Figure 2 REL = 2.0M RSW = 1.0M --VDD = 2.5V to 4.5V VDD = 2.5V to 4.5V VIH = VDD = 2.5V to 4.5V
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HV860
Electrical Characteristics (cont.)
Symbol IIL CIN Parameter Enable input logic low current Enable input capacitance Min Typ Max -1.0 15 Units A pF Conditions VIL = 0V, VDD = 2.5V to 4.5V ---
Recommended Operating Conditions
Symbol VDD fSW fEL CLOAD TA Parameter Supply voltage Switching frequency EL output frequency EL lamp capacitance load Operating Temperature Min 2.5 40 200 0 -40 Typ Max 4.5 200 500 20 +85 Units V kHz Hz nF C Conditions -----------
Pin Configuration and External Component Description
Pin # 1 Name REL-OSC Description External resistor from REL-OSC to VDD sets the EL frequency. The EL frequency is inversely proportional to the external REL resistor value. Reducing the resistor value by a factor of two will result in increasing the EL frequency by two. Input voltage to set VCS regulation voltage. This pin allows an external voltage source to control the VCS amplitude. EL lamp dimming can be accomplished by varying the input voltage to VREG. The VCS voltage is approximately 87 times the voltage seen on VREG. External resistor RREG, connected between VREG and VREF pins controlls the VCS charging rate. The charging rate is inversely proportional to the RREG resistor value. 3 4 VREF GND Switched internal reference voltage. Device ground. Drain of internal switching MOSFET. Connection for an external inductor. The inductor LX is used to boost the low input voltage by inductive flyback. When the internal switch is on, the inductor is being charged. When the internal switch is off, the charge stored in the inductor will be transferred to the high voltage capacitor CS. The energy stored in the capacitor is connected to the internal H-bridge, and therefore to the EL lamp. In general, smaller value inductors, which can handle more current, are more suitable to drive larger size lamps. As the inductor value decreases, the switching frequency of the inductor (controlled by RSW) should be increased to avoid saturation. A 220H Cooper (SD3814-221) inductor with 5.5 series DC resistance is typically recommended. For inductors with the same inductance value, but with lower series DC resistance, lower RSW resistor value is needed to prevent high current draw and inductor saturation. 6 7 8 9 10 11 12 NC CS VB VA VDD EN RSW-OSC No internal connections to the device. High voltage regulated output. Connection for an external high voltage capacitor to ground VB side of the EL lamp driver H-bridge. Connection for one of the EL lamp terminals. VA side of the EL lamp driver H-bridge. Connection for one of the EL lamp terminals. Low voltage input supply pin. Logic input pin. Logic high will enable the device. External resistor from RSW-OSC to VDD sets the switch converter frequency. The switch converter frequency is inversely proportional to the external RSW resistor value. Reducing the resistor value by a factor of two will result in increasing the switch converter frequency by two.
2
VREG
5
LX
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HV860
Figure 1: Block Diagram
VDD EN Device Enable PWM Switch Oscillator 0 to 88% VA VSENSE 1.26V VREF Output Drivers VCS 2x EL Freq. EL Frequency LX CS
RSW-OSC
VREG
60pF VREF REL-OSC
GND
Figure 2: Typical Application / Test Circuit
+ -
VIN
VDD 0.1F 1.5V = ON 0V = Off
Typical Performance
VDD 3.0V Lamp Size VIN 3.0V 3.0in2 3.5V 4.2V IIN 16.17mA 14.18mA 12.13mA 100V (peak) 196Hz VCS fEL Brightness 18.2cd/m2 19.3cd/m2 19.9cd/m2
4.7F 3.3M
2 10 3 5
C
+
1.0M 12
VB
220H (Cooper Inductor SD3814-221) BAS21
7 9 8
VREG VDD
VREF
LX CS VA VB
3.3nF 200V
RSW-OSC 2.0M 1 REL-OSC 11 EN
3.0in2 EL Lamp
GND 4
HV860K7
NR040306
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HV860
Figure 3: Typical Waveform on VA, VB, and Differential Waveform VA - VB
Split Supply Configuration
The HV860 can also be used for handheld devices operating from a battery where a regulated voltage is available. This is shown in the Figure 4. The regulated voltage can be used to run the internal logic of the HV860. The amount of current necessary to run the internal logic is 200A max. Therefore, the regulated voltage could easily provide the current without being loaded down.
Enable/Disable Configuration
The HV860 can be easily enabled and disabled via a logic control signal on the EN pin as shown in the Figure 4. The control signal can be from a microprocessor. When the microprocessor signal is high the device is enabled, and when the signal is low, it is disabled.
Figure 4: Split Supply and Enable/Disable Configuration
+ -
VIN
CIN LX RREG
2 3 5
D CS
7 9 8
Regulated Voltage = VDD CDD On = 1.5V Off = 0V
10
VREG VDD RSW-OSC REL-OSC EN
VREF
RSW
LX CS VA VB
12 1
REL 11
EL Lamp
GND
4
HV860K7
NR040306
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HV860
Audible Noise Reduction
The EL lamp, when lit, emits an audible noise. This is due to EL lamp construction. The audible noise generated by the EL lamp can be a major problem for applications where the EL lamp is held close to the ear, such as cellular phones. The HV860 employs a proprietary circuit to help minimize the EL lamp's audible noise by using a single resistor, RREG, as shown in Figure 5.
Figure 5: Typical Application Circuit for Audible Noise Reduction
VIN CIN LX RREG
2 3 5
D CS
7 9 8
VDD CDD 1.5V = On 0V = Off
10
VREG VDD RSW-OSC REL-OSC EN
VREF
RSW
LX CS VA VB
12 1
REL 11
EL Lamp
GND
4
HV860K7
How to Minimize EL Lamp Audible Noise
The audible noise from the EL lamp can be minimized with the proper selection of RREG. RREG is connected between the VREF and VREG pins. VREG has an internal 60pF capacitor to ground. EL lamp noise can be minimized without much loss in brightness by setting the RC time constant to be approximately 1/12TH of the EL frequency's period.
EL Lamp Dimming using PWM
This section describes the method of dimming the EL lamp. Reducing the voltage amplitude at the VREG pin will reduce the voltage on the VCS pin, which will effectively reduce the peak the peak voltage the EL lamp sees. Figure 5 shows a circuit to dim the lamp by changing the duty cycle of a PWM signal. A 10k resistor is connected in series with a 3.3M resistor. An n-channel open drain PWM signal is used to pull the 10k resistor to ground. The effective voltage on the VREG pin will be proportional to the duty cycle of the PWM signal. The PWM operating frequency can be anywhere between 20kHz to 100kHz.
Figure 6: PWM Dimming Circuit
+ -
VIN Open Drain n-channel PWM Signal
4.7F 220H (Cooper Inductor SD3814-221)
3.3M 10k 2 VREG 3 5 VREF LX CS
BAS21
7 9 8
10
+ -
3.3nF 200V
VDD
0.1F
On = 1.5V Off = 0V
1.0M 12 RSW-OSC 2.0M 1 REL-OSC 11 EN
VDD
VA VB
EL Lamp
GND 4
HV860K7
NR040306
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HV860
12-Lead QFN Package Outline (K7)
0.73 0.85 1.25 1.65 0.73 0.85 Pin #1 3.00 0.18 0.30 1.55 2.40 1.25 1.65
All dimensions are in millimeters Legend: min max
0.30 0.50 0.5 3.00
Top View
~ 14O 0.70 0.80
0.20
Side View
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to http://www.supertex.com/packaging.html.)
Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell its products for use in such applications, unless it receives an adequate "product liability indemnification insurance agreement". Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the Supertex website: http//www.supertex.com.
(c)2006 Supertex inc. All rights reserved. Unauthorized use or reproduction is prohibited.
Supertex inc.
1235 Bordeaux Drive, Sunnyvale, CA 94089 TEL: (408) 222-8888 / FAX: (408) 222-4895
Doc.# DSFP - HV860 NR040306
www.supertex.com
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